Red Hat Refreshes RISC-V Developer Preview with RHEL 10.2
Red Hat has released an update to its Red Hat RISC-V Developer Preview, refreshing the codebase from Red Hat Enterprise Linux (RHEL) 10.0 to RHEL 10.2. The initial preview launched in May 2025. Now, just over a year later, the platform is getting a meaningful push forward.
The hardware platform stays the same, the SiFive HiFive Premier P550, but the new release packs in more upstream code for that board. It also brings incremental updates for the RISC-V instruction set architecture more broadly.
Furthermore, the expanded upstream code may allow additional systems to boot and run the RHEL 10.2 preview image. Some community members have already managed to boot the image on boards with the StarFive JH7110 and UltraRISC DP1000 processors, as well as on QEMU. However, Red Hat stresses that those configurations are experimental. The only hardware the company has officially tested is the SiFive HiFive Premier P550. Onboard graphics drivers are not included.
The refresh is available now at developers.redhat.com.
Red Hat sees the Red Hat RISC-V Developer Preview as part of a broader mission to champion open IT infrastructure. RISC-V is an open standard for CPU and accelerator design, and Red Hat believes that an open CPU architecture naturally supports an open hardware ecosystem, and, in turn, an open source software community. The company continues to integrate RISC-V support into upstream communities.
For enterprises and developers evaluating RISC-V, this preview also serves as a practical reference point. It demonstrates how the architecture may apply to IT infrastructure, edge computing, and embedded applications. Red Hat notes that RISC-V adoption will ultimately depend on each market segment’s own criteria, but early access gives teams the data they need to decide.
